zlayout.logic_circuits Namespace Reference

Classes
class	ClockEdge
class	Counter
class	FlipFlop
class	LogicState
class	ProcessorFSM
class	SequentialLogic
class	Signal
class	StateMachine

Variables
	d_ff = FlipFlop("D_FF_1", "D")
	counter = Counter("Counter_4bit", width=4, count_up=True)
	count_value = counter.internal_state["count"]
	cpu_fsm = ProcessorFSM("CPU_FSM")

Detailed Description

复杂逻辑电路类系统
只保留有复杂时序逻辑和状态机的组件，其他基本组件使用数据库存储

Variable Documentation

count_value

zlayout.logic_circuits.count_value = counter.internal_state["count"]

Definition at line 378 of file logic_circuits.py.

counter

zlayout.logic_circuits.counter = Counter("Counter_4bit", width=4, count_up=True)

Definition at line 372 of file logic_circuits.py.

cpu_fsm

zlayout.logic_circuits.cpu_fsm = ProcessorFSM("CPU_FSM")

Definition at line 383 of file logic_circuits.py.

d_ff

zlayout.logic_circuits.d_ff = FlipFlop("D_FF_1", "D")

Definition at line 361 of file logic_circuits.py.