ZLayout EDA Library v1.0.0
Advanced Electronic Design Automation Layout Library with Bilingual Documentation
|
Hierarchical layout optimizer for billion-scale designs. More...
#include <layout_optimizer.hpp>
Public Member Functions | |
HierarchicalOptimizer (const geometry::Rectangle &chip_area, const OptimizationConfig &config=OptimizationConfig{}) | |
void | create_ip_block (const std::string &name, const geometry::Rectangle &boundary) |
Create an IP block. | |
void | add_component_to_block (const std::string &block_name, const Component &comp) |
Add component to an IP block. | |
void | add_net (const Net &net) |
Add net (automatically determines if inter-block or intra-block) | |
CostResult | optimize () |
Run hierarchical optimization. | |
std::vector< std::pair< Component, geometry::Point > > | get_final_layout () const |
Get final layout result. |
Hierarchical layout optimizer for billion-scale designs.
Decomposes the problem into manageable IP blocks, optimizes each block separately, then optimizes block placement.
Definition at line 221 of file layout_optimizer.hpp.
|
inline |
Definition at line 241 of file layout_optimizer.hpp.
void zlayout::optimization::HierarchicalOptimizer::add_component_to_block | ( | const std::string & | block_name, |
const Component & | comp ) |
Add component to an IP block.
void zlayout::optimization::HierarchicalOptimizer::add_net | ( | const Net & | net | ) |
Add net (automatically determines if inter-block or intra-block)
void zlayout::optimization::HierarchicalOptimizer::create_ip_block | ( | const std::string & | name, |
const geometry::Rectangle & | boundary ) |
Create an IP block.
std::vector< std::pair< Component, geometry::Point > > zlayout::optimization::HierarchicalOptimizer::get_final_layout | ( | ) | const |
Get final layout result.
CostResult zlayout::optimization::HierarchicalOptimizer::optimize | ( | ) |
Run hierarchical optimization.